1. Field of the Invention
The present invention relates to an AC-coupled, DC stacked type BC diode attenuator, and more particularly, to an attenuator capable of tolerating a comparable degree of a distortion characteristic up to a comparable degree of transmit power in a thru state and an attenuation state and an attenuator capable of compensating for a gain compression characteristic of a power amplifier in a thru state.
2. Background Art
A GaAs-HBT (hetero junction bipolar transistor) power amplifier is widely used as a power amplifier for a cellular phone carrying out CDMA (Code Division Multiple Access) or a power amplifier for a wireless LAN in recent years.
Since the GaAs-HBT requires no negative base bias voltage, it can operate with a single power supply and obtain a more uniform device characteristic than a GaAs-FET. Therefore, the GaAs-HBT has been increasingly applied to a GaAs-based power amplifier such as a cellular phone and a wireless LAN in recent years.
However, when an RF (high frequency) switch element is constructed in a normal GaAs-HBT process, it is not possible to form a switch which can turn ON only through application of a base voltage. Therefore, a switch using a base-collector junction diode (BC diode) having a junction similar to a p-i-n junction is used (for example, see Japanese Patent Laid-Open No. 2003-347870).
FIG. 14 is a circuit diagram showing a conventional switch using a BC diode. This switch includes a diode D1 whose anode is connected to an input terminal IN and whose cathode is connected to an output terminal OUT, a control voltage terminal Vc1 connected to the anode of the diode D1 via an RF blocking inductor L1, and a resistor R1 and an RF blocking inductor L2 connected in series between the cathode of the diode D1 and a grounding point.
In the switch in FIG. 14, when a voltage equal to or above an ON voltage (approximately 1.25 V) of the diode D1 is applied to the control voltage terminal Vc1, the diode D1 is changed from an OFF state to an ON state and an electric current Idc determined by the resistor R1 flows through the diode D1. In this way, when the diode D1 turns ON, an RF signal inputted from the input terminal IN is transmitted to the output terminal OUT. On the other hand, when a voltage (also including a negative bias) which is smaller than the ON voltage of the diode D1 is applied to the control voltage terminal Vc1, the diode D1 turns OFF and prevents the transmission of the RF signal.
Furthermore, FIG. 15 is a circuit diagram showing a conventional attenuator using a BC diode. In addition to the configuration in FIG. 14, it includes a resistor R01 whose one end is connected to the anode of a diode D1, a resistor R02 whose one end is connected to the cathode of the diode D1, a diode D2 whose anode is grounded via a capacitor C2 and whose cathode is connected to the other end of the resistor R01 via a capacitor C1 and the cathode connected to the other end of the resistor R02 and a control voltage terminal Vc2 connected to the anode of the diode D2 via an RF blocking inductor L2 and the resistor R4.
In the attenuator in FIG. 15, when a voltage equal to or above an ON voltage of the diode D1 is applied to a control voltage terminal Vc1 and a voltage smaller than an ON voltage of the diode D2 (also including a negative bias) is applied to the control voltage terminal Vc2, a “thru state” is set in which an RF signal inputted from the input terminal IN is transmitted to the output terminal OUT as is. On the other hand, when a voltage smaller than the ON voltage of the diode D1 is applied to the control voltage terminal Vc1 and a voltage equal to or above the ON voltage of the diode D2 is applied to the control voltage terminal Vc2, an attenuation state determined by the resistors R01 and R02, and the ON resistance of the diode D2 is set. However, when the capacitors C1 and C2 are fabricated on a GaAs chip, the capacitance thereof becomes small, and therefore the impedance values in the operating frequency bands of the capacitors C1 and C2 also become factors for determining the amount of attenuation.
Here, FIG. 16 shows an RF signal inputted from the input terminal IN. The RF signal is expressed by an electric current I (t) which passes through the diode D1 and the maximum value of the amplitude is Imax and the period is T. The allowable input power is limited to a level at which insertion loss does not increase in the value of the bias current Idc applied to the diode D1. More specifically, as shown in Expression (1), the allowable input power is limited so that the time integrated value of the half wave of the current I (t) which passes through the diode D1 (equivalent to the total amount of charge in the half wave) becomes smaller than the product of the bias current Idc and a time constant τ. Here, the time constant τ is determined by a junction material of the diode and a junction state (concentration and thickness of an i layer (high resistance layer) or the like).
                                          ∫            0                          T              /              2                                ⁢                                    I              ⁡                              (                t                )                                      ⁢                                                  ⁢                          ⅆ              t                                      =                              I            ⁢                                                  ⁢                          max              /                              (                                  π                  *                  f                                )                                              <                      i            ⁢                          ⅆ              c                        *            τ                                              (        1        )            
Therefore, under a condition under which the bias current Idc is the same, a signal can only pass with smaller power as the frequency lowers. Especially, when a BC diode is fabricated in a GaAs-HBT process, a BC layer is determined by an RF characteristic of the HBT, and therefore there is no degree of freedom in the structural design of the BC layer. Furthermore, since the time constant τ of a GaAs-based diode is smaller by approximately double digits compared to a Si-based p-i-n diode, the allowable input power is quite small. Therefore, when the BC diode is applied to a switch or an attenuator, a large bias current needs to be passed to obtain desired allowable transmit power.
To solve this problem, the inventor invented a switch shown in FIG. 17 and FIG. 18 and an attenuator using the switch.
The switch in FIG. 17 includes a diode D1 whose anode is connected to an input terminal IN and whose cathode is connected to an output terminal OUT, a control voltage terminal Vc1 which is connected to the anode of the diode D1 via an RF blocking inductor L1, a diode D2 whose anode is connected to the cathode of the diode D1 and whose cathode is connected to the anode of the diode D1 via a capacitor C1, and a resistor R1 and an RF blocking inductor L2 connected in series between the cathode of the diode D2 and a grounding point.
In the attenuator in FIG. 18, the anode of a diode D1 is connected to an input terminal IN and the cathode of the diode D1 is connected to an output terminal OUT. Furthermore, a control voltage terminal Vc1 is connected to the anode of the diode D1 via an RF blocking inductor L1. The anode of a diode D2 is connected to the cathode of the diode D1 and the cathode of the diode D2 is connected to the anode of the diode D1 via a capacitor C1.
Furthermore, one end of a resistor R01 is connected to the cathode of the diode D2 and one end of a resistor R02 is connected to the cathode of the diode D1 via a capacitor C2. The anode of a diode D3 is connected to the other ends of the resistors R01 and R02 via a capacitor C3 and the cathode of a diode D4 is connected to the other ends of the resistors R01 and R02 via a capacitor C4. Furthermore, one end of a capacitor C5 is connected to the cathode of thee diode D3 and the anode of the diode D4 and the other end of the capacitor C5 is grounded.
Furthermore, a control voltage terminal Vc2 is connected to the cathode of the diode D2 via an RF blocking inductor L2 and a resistor R2. A control voltage terminal Vc3 is connected to the anode of the diode D3 via an RF blocking inductor L3 and a resistor R3. Moreover, a control voltage terminal Vc4 is connected to the cathode of the diode D4 via an RF blocking inductor L4 and a resistor R4.
In the attenuator in FIG. 18, when a voltage (high level) equal to or above ON voltages of the diodes D1 and D4 is applied to the control voltage terminals Vc1 and Vc4 and a voltage (low-level) smaller than ON voltages of the diodes D2 and D3 is applied to the control voltage terminals Vc2 and Vc3, a thru state is set in which the RF signal inputted from the input terminal IN is transmitted to the output terminal OUT as is. On the contrary, a voltage (low-level) smaller than the ON voltages of the diodes D1 and D4 is applied to the control voltage terminals Vc1 and Vc4 and a voltage (high level) equal to or above the ON voltages of diodes D2 and D3 is applied to the control voltage terminals Vc2 and Vc3, an attenuation sate is set. The amount of attenuation is determined by the resistors R01 and R02, capacitance values of the capacitors C1 to C6, bias current Idc and bias voltage.
Furthermore, the diodes D1 and D2 are connected in series in terms of a direct current and connected in parallel via the capacitor C1 in terms of an alternating current. In this way, when a high-level voltage is applied to the control voltage terminal Vc1, the DC bias current Idc commonly flows through the diodes D1 and D2. On the other hand, in terms of an alternating current, this is equivalent to double Idc flowing, and therefore the bias current Idc apparently approximately doubles and Imax in Expression (1) approximately doubles. Therefore, since allowable transmit power is expressed by Ro·Imax·Imax/2 (Ro is characteristic impedance of the system), the allowable transmit power improves approximately four times that of the circuit in FIG. 15.
FIG. 19 shows a thru power characteristic of the attenuator in FIGS. 15 and 18. As shown in the figure, the circuit in FIG. 18 shows the allowable transmit power improved by approximately 6 to 8 dB compared to the circuit in FIG. 15.
FIG. 20 shows an output characteristic of the attenuator in FIG. 18 in an attenuation state. Here, signal distortion is expressed by tertiary mutual modulation distortion Pim3 when two signals are input As a result of an experiment, a drastic increase of signal distortion was observed at the time of high power input in an attenuation state of 20 dB. Such drastic increase of signal distortion was not observed in a thru state. Such an increase of signal distortion is not desirable because it leads to deterioration of signal quality in the system using a modulated signal or the like.
Therefore, the inventor invented an attenuator which adds a linearizer L to the circuit in FIG. 18 as shown in FIG. 21. This linearizer L is provided between an input terminal IN and the anode of a diode D1. The linearizer L includes a diode D5 whose anode is grounded and whose cathode is connected to a connection point between the input terminal IN and the anode of the diode D1 and a resistor RLT1 connected between a connection point between the input terminal IN and the anode of the diode D1 and a control voltage terminal Vc5.
Here, when the control voltage terminal Vc5 is at high level (e.g., 5 V), a large reverse bias voltage is applied to the diode D5 and the linearizer L does not operate. On the other hand, when the VcL is driven to low level (e.g., 0 V), the linearizer L operates. When an input power Pin is high, a gain Gp of the linearizer L decreases. Therefore, the gain of the attenuator increases at the time of high power input.
Therefore, a setting is made such that a low-level voltage is applied to the control voltage terminal Vc5 only in the attenuation state. In this way, the linearizer L operates only in the attenuation state and linearizes the signal inputted from the input terminal IN. Therefore, in a thru state, the linearizer L does not operate and the attenuator shows a thru state characteristic in FIG. 20.
FIG. 22 shows a characteristic at the time of attenuation of the attenuator in FIG. 21. The flat section of a gain Gp is improved as shown by a dotted line and the characteristic of tertiary distortion Pim3 is also improved accordingly. Therefore, this attenuator can improve the distortion characteristic at the time of high power input in the attenuation state, and therefore it is possible to tolerate a comparable degree of the distortion characteristic up to a comparable degree of transmit power in the thru state and the attenuation state. Furthermore, as in the case of the attenuator in FIG. 18, it is also possible to improve the allowable transmit power by approximately 6 dB or more with the same bias current compared to the circuit in FIG. 15.
Furthermore, since the attenuator ATT in FIG. 21 has large allowable transmit power with a low bias current, even if it is provided between the stages of power amplifiers A1 to A3 as shown in FIG. 23, distortion produced from the attenuator ATT is small. Therefore, it is possible to provide a power amplifier which has a low noise characteristic.
Here, a normal power amplifier has a gain compression characteristic as shown in FIG. 24. Most part of the gain compression characteristic is produced in the power amplifier section, but some part of the gain compression characteristic is produced in the attenuator section in a thru state, too. Therefore, a linearizer having a gain expansion characteristic needs to be provided before the power amplifier to extend the linear area (area where the gain is flat) as much as possible. However, the attenuator in FIG. 21 has no function of compensating for the gain compression characteristic of the power amplifier in a thru state, and therefore it is necessary to provide a different linearizer having a gain expansion characteristic before the power amplifier or between stages, which results in a problem of causing the chip area to increase.